The present invention relates to a MOSFET formed on a substrate, and in particular to a semiconductor device capable of operating at high speed and with high reliability and its fabrication method.
One of conventional techniques relating to the MOSFET is disclosed in Japanese Laid-Open Patent Publication No. 60-50960 (1985), for example. FIG. 1 shows the structure and energy band of a surface channel MOSFET based on such a conventional technique. The prior art will now be described by referring to FIG. 1. A p-type semiconductor substrate 1, an insulation layer 2, a gate 3, a source 4 and a drain 5 are illustrated in FIG. 1.
In a MOSFET of the prior art shown in FIG. 1A, the source 4 and the drain 5 comprising an n.sup.+ type semiconductor are disposed in the upper part of the p-type semiconductor substrate 1. On the surface of the above described semiconductor substrate between the source 4 and the drain 5, the gate 3 is disposed via the insulation layer 2. The energy band of this FET derived at a section C-C' of FIG. 1A when V.sub.GS which is equal to the threshold voltage V.sub.th is applied as the forward gate voltage is shown in FIG. 1B. That is to say, the energy level E.sub.c representing the bottom of the conduction band, the intrinsic Fermi level E.sub.i, and the energy level E.sub.v at the top of the valence band are largely bent near the insulation layer 2 located under the gate 3 by the gate voltage V.sub.GS. Accordingly, a channel is formed on the surface of the semiconductor substrate 1 immediately under the insulation layer 2. When the illustrated MOSFET is turned ON, therefore, the drain current is distributed so as to be concentrated to a range of several ten angstroms in depth from the surface of the semiconductor substrate 1.
As understood from the bend of the energy band shown in FIG. 1B, the above described MOSFET has a large electric field in a direction (longitudinal direction) perpendicular to the direction of the drain current. This electric field is maximized at the surface of the semiconductor substrate 1. Accordingly, such a prior art MOSFET has a problem in that the movement of electrons for letting flow the drain current, i.e., carriers are obstructed by the effect of the surface scattering and hence it is difficult to obtain a large drain current.
Another problem of this MOSFET of the prior art will now be described. As the size of the gate is decreased, the peak value of the electric field concentrated at the end of the drain under the gate becomes large. As a result of this electric field, carriers acquire sufficient high energy so as to get over the energy barrier between the semiconductor substrate 1 comprising silicon and its oxide film, resulting in hot carriers. The hot carriers enter into the insulation layer 2 comprising SiO.sub.2. This results in a problem that the characteristics of the MOSFET are varied.
The above described MOSFET of the prior art has a further problem in that the withstand voltage between the source and drain is lowered when the size of the gate is reduced. This problem can be solved to some degree by raising the concentration of impurities of the substrate. In this case, however, the difference in concentration of impurities between the drain and the substrate is expanded to increase the electric field. This results in a problem that the avalanche breakdown voltage is lowered and degradation of device characteristics due to hot carrier injection is accelerated. Further, the capacitance between the source and the substrate and that between the drain and the substrate also increase, resulting in a problem of a lowered operation speed of the MOSFET.